Section III. STAGE ANALYSIS

TM 11-6625-601-34

S10D (rear), to contact 1 of SQUELCH switch

to the transmitter circuit in the RT

S7A (front). Setting switch S7A to CARR applies

3 4 8 / A R C - 5 4 . This ground keys the trans-

ground from contact 3, through contacts 9 and

mitter, applying rf power through plug P1002

10 of switch S9A (front) and contacts 2 and 4

and RCVR/XMTR jack J12 to plug P3 of relay

of switch S11F (front), to the flag circuit. Select-

K1. From plug P3, rf power is routed, through

ing the squelch tone mode of operation applies

normally closed contacts of relay K1, plug P4,

ground, through pin 11 of plug P1005, pin 11 of

RCVR/XMTR jack J2, and DIR COUPLER IN

jack J11, and contacts 12 and 2 of switch S10F

jack J3, to plug P1 of directional coupler DC1.

(front), to contact 2 of switch S7A (front). Sett-

A portion of the rf power, reflected and incident,

ing switch S7A to TONE applies ground from

is applied from the directional coupler to the RF

contact 3, through contacts 9 and 10 of switch

POWER meter and switch assembly. The main

S9A (front) and contacts 2 and 4 of switch S11F

portion of the rf power is routed from the direc-

(front), to the flag circuit in the ID-48/ARN.

tional coupler, through plug P2, DIR COUPLER

e. Security

TONE

Operation

Test.

OUT jack J6, LOAD IN jack J5, and plug P7 to

SECURITY switch S8A in the test set simulates

attenuator-dummy load AT1. The attenuator-

the operational control function that normally

dummy load connects rf power to external test

originates in the security device. Setting switch

equipment and a test antenna. Rf power is

S8A (front) to OFF applies ground to the 150

routed to the external test equipment through

Hertz (Hz) tone injection circuit in the

j a c k J3 on the attenuator-dummy load and

RT-348/ARC-54, through contacts 3 and 1 of

LOAD OUT jack J8. The test antenna receives

S8A (front), pin 39 of RCVR/XMTR jack J11, and

rf power through jack J2 on the attenuator-

pin 39 of plug P1005. Setting switch S8A (front)

dummy load and ANT jack J7.

to SEC applies ground to the sidetone injection

g. Receive Test. When transmit control switch

circuit in the RT348/ARC-54, through contacts

S6 is in the RCV position, rf test signals can be

3, 2, and 5 of S8A, pin 43 of jack J11, and pin

applied through RCVR/TEST jack J4 to the rf

43 of plug P1005. Ground applied to contact 5

i n p u t circuit in the RT-348/ARC-54. With

of switch S8A (front) is applied to the squelch

switch S6 in the RCV position, ground is applied

disable circuit in the RT-348/ARC-54, through

through contacts 3 and 5, and 1 and 4, to contact

contacts 10 and 8 of switch S10D (front), pin 12

9 of RCVR/XMTR FUNCTION switch S9A

of jack J11, and pin 12 of plug P1005.

( r e a r ) . Setting switch S9 to TEST applies

f. Transmit Test. The test set contains a

ground, through contacts 9 and 11 of S9A (rear)

t r a n s m i t t e r control switch, a directional

and contacts 11 and 1 of TEST FUNCTION

coupler, a power meter, and an attenuator-

SELECTOR switch S11F (front), to terminal 2

dummy load for checking the transmitter circuit

of relay K1. Relay K1 is energized through the

in the RT-348/ARC-54. Setting transmit control

ground return path just described and the +27.5

switch S6 to PTT or XMIT applies ground to the

volts dc applied to terminal 1. An rf test signal

inverter and blower assembly, XMIT lamp DS2,

is applied, through plug P5 of K1, closed con-

a n d contact 8 of RCVR/XMTR FUNCTION

t a c t s of energized relay K1, plug P3, and

switch S9B (rear). From contact 8 of switch S9B

RCVR/XMTR jack J12, to plug P1002 in the rf

(rear), ground is routed, through pin 42 of

input circuit in the RT-348/ARC-54.

RCVR/XMTR jack J11 and pin 42 of plug P1005,

Section Ill. STAGE ANALYSIS

3) of transformer T1 through a filter circuit com-

1-9. Test Set, Radio TS-1967/ARC-54 800-Hz

posed of capacitors C2 and C3 and resistors R16

Inverter and Blower Assembly Circuit

and R15. The filter circuit prevents transients

The 800-Hz inverter in the test set is a saturable

generated by the inverter circuit from entering

core, square-wave oscillator that produces 54

the +27.5-volt dc supply. The inverter circuit

volts alternating current (ac) to operate the

consists of transistors Q1 and Q2, saturable core

blower motor (fig. l-l). The +27.5-volt dc bus on

transformer T1, and resistors R11 through R14.

terminal board TB1 supplies operating voltage

Voltage divider R11 and R13 develops bias for

for the inverter circuit (fig. FO-7). Transmit

transistor Q1. Voltage divider R12 and R14

control switch S6 (at XMIT or PTT position)

develops bias for transistor Q2. When operating

completes the circuit to ground (fig. 1-1). The

voltage is first applied to the circuit, both trans-

+27.5 volts dc is applied to the center tap (pin

istors try to conduct. Circuit tolerances and d;f-

1-8